Supercapacitors present new challenges for system designers
Designers have to be careful not to exceed the capability of the host power supply in many battery-based systems or power-limited interface ports where the average current available is limited and loads demand high peak currents. Often, the peak current available is significantly less than the load demands. This is especially true with a growing variety of wireless data cards in PC card, CompactFlash, PCI or USB format used for GSM, GPRS, TD-CDMA and WiMAX data communication.
These wireless protocols all use TDMA techniques that require a high peak current during the transmission phase. The peak current during transmit for a GSM power amplifier, for example, can reach 2A. During the receive phase the current is considerably less (~100mA). This wide range allows the designer to "average" the current drawn from the supply by using capacitors to store the energy during the off period and releasing the peak current when required.
DESIGN CHALLENGES
Conventional capacitor technology would require either a very large case size or multiple devices connected in parallel. To reduce the size of the solution, designers typically turn to very high value or so-called "super" capacitors that exhibit a high capacitance in a relatively small case size. However, using a supercapacitor brings unique design challenges.
While a supercapacitor's low ESR helps support high peak currents, it can also present a problem during the charge cycle. In any system the supercapacitor is initially discharged. When the supply voltage is first applied, the supercapacitor looks like a low value resistor (ESR). This can result in a huge in-rush current if the current is not controlled or limited. Clearly, any time designers use supercapacitors, they must limit in-rush current.
Several options are available. The simplest one is to use a series resistor. In a PC card, the maximum current that can be drawn prior to successful "Host/Card" negotiation is 70mA. Assuming that the PC card controller needs half that current to perform the negotiation, then at power-up the supercapacitor must either be disconnected from supply or current limited using a ~100Ω resistor (R = V/I). At that rate, the capacitor will be fully charged in approximately 6.7min, assuming that the capacitor is fully charged in approximately five time constants.
A more practical solution is to allow the PC card to source more power after the successful negotiation between host and card. A lower value resistor can then be used to increase the charging current. Initially, the voltage of the capacitor is still low and the power dissipation in the resistor would be very high. As the capacitor starts to charge and the voltage starts to rise, the power dissipation reduces and the resistor value can be decreased.
Figure 1 illustrates a sample circuit comprised of a series of decreasing resistor values being switched in during the capacitor charging cycle. The timing of the switching points would have to be either timed, which requires very accurate, expensive resistors, or monitored by several additional voltage detectors. Moreover, when the capacitor is fully charged and the PC card is removed, the energy stored in the capacitor would be sufficient to damage the connector pin.
SMARTSWITCH
Another way to charge the supercapacitor is to use an industry standard current-limiting "Smartswitch." These so called Smartswitches use an integrated P or N channel MOSFET as a load switch, and integrate additional monitoring and protection circuitry to limit the amount of output current. Most products feature thermal overload protection, so that if the chip temperature exceeds its rated maximum while in current limit, the device will turn off. As the chip cools down, the device will turn back on and thermally oscillate at a low frequency until the period of high dissipation ends.
In a supercapacitor application, the Smartswitch will turn on and immediately limit current due to the high in-rush current. This high in-rush current causes a huge temperature rise and drives the device into thermal shutdown where it will thermally oscillate as previously described. This is not a problem since all current-limited Smartswitches are designed to do this. However, during the time the switch is off, the capacitor in not charging, increasing the time to full charge. Furthermore, without additional circuitry, there is no way to detect when the capacitor is fully charged and tell the system that it is ready to start transmitting.
Recently, power semiconductor manufacturers have developed a new type of device that overcomes all the problems related to safely charging a supercapacitor in the minimum amount of time. These highly integrated devices could combine a P-channel MOSFET load switch with all the circuitry needed to limit current, protect the PC Card connector, continuously charge the capacitor, provide notification when the system is ready for use and decide when to start recharging the capacitor. If these functions are packed into a 12-pin TSOPJW package, for instance, these devices could occupy less than 9mm2 of PCB.
Figure 2 shows an application diagram using one of these new devices. The device has two externally programmable current limits, which can be used to provide different limits during the host/card negotiation. On power up, the device provides a low resistance path between supply and supercapacitor. If the thermal dissipation is low, then the device will eventually enter current limiting and the capacitor will continue to charge until it reaches approximately 98 percent of its final value. At that point the system ready signal will change state alerting the system that transmission can begin.
If the thermal dissipation is high, then the chip temperature will quickly rise. When it reaches an internally programmed limit, the device will initiate an integrated digital power loop that will reduce the current to a safe value. The power loop will regulate the die temperature to approximately 100°C by sensing the die temperature at regular intervals, and increasing or decreasing the current by 1/32 of the current limit set point. This function protects the device while minimizing charge time by ensuring that the supercapacitor is charging at all times.
In most applications, the supercapacitor is sized to minimize the voltage droop during transmission, and to allow recharging during the receive phase. By adding adjustable hysteresis, this device allows the user to set the point at which the supercapacitor is "topped up." It can be set from any value from 200mV less than full charge to zero.
Supercapacitors for portable systems have previously been limited to back-up or stand-by applications where currents are low and charge time is often long. With the increased use of data cards for portable applications, designers must take special care to ensure that the charge time is minimized while their system solution remains small. A new generation of smart switches, which integrate all the circuitry required to limit current, protect the PC card connector, continuously charge the capacitor and notify the system when the capacitor is ready for use offer designers the opportunity to develop a complete solution while minimizing component count and reducing system size.